International Journal of Applied Information Systems |
Foundation of Computer Science (FCS), NY, USA |
Volume 7 - Number 7 |
Year of Publication: 2014 |
Authors: Aparna N, Mamatha H R, Dheerendra Singh Tomar, Rakesh Kumar |
10.5120/ijais14-451215 |
Aparna N, Mamatha H R, Dheerendra Singh Tomar, Rakesh Kumar . Design of SD/eMMC Protocol Compliance Solutions. International Journal of Applied Information Systems. 7, 7 ( August 2014), 33-36. DOI=10.5120/ijais14-451215
Protocol Validation is an important step in validating the I/O interface of the System on Chip (SoC). In developing the protocol compliance solutions for validating the Secure Digital/Embedded Multi Media Controller (SD/eMMC) protocol, the main intention is to capture the behavior of protocol under various physical conditions using a Logic Analyzer (LA). LA facilitates more capture of data and offers more number of channels and is more cost effective compared to existing Digital Storage Oscilloscope (DSO) methodology. In addition to decode, the solution is capable of carrying out the analysis of the data captured and decoded from LA. Analysis functionality includes command-response analysis, cyclic redundancy check, integrity check and flow analysis that assess and reports the functionality and performance of the protocol under variations of temperature & voltage conditions. Analyzer helps in tracing out all kind of deviations from the specifications and standards defined for SD and eMMC.